Silicon Labs /SiM3_NRND /SIM3L167_C /AES_0 /CONTROL

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Interpret as CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XFRSTA)XFRSTA 0 (DISABLED)KEYCPEN 0 (DECRYPT)EDMD 0 (DISABLED)SWMDEN 0 (DISABLED)BEN 0 (XOR_DISABLED)XOREN 0 (DISABLED)HCTREN 0 (DISABLED)HCBCEN 0 (KEY128)KEYSIZE 0 (DISABLED)ERRIEN 0 (DISABLED)OCIEN 0 (HALT)DBGMD 0 (INACTIVE)RESET

DBGMD=HALT, EDMD=DECRYPT, HCBCEN=DISABLED, RESET=INACTIVE, KEYCPEN=DISABLED, ERRIEN=DISABLED, XOREN=XOR_DISABLED, SWMDEN=DISABLED, KEYSIZE=KEY128, HCTREN=DISABLED, OCIEN=DISABLED, BEN=DISABLED

Description

Module Control

Fields

XFRSTA

AES Transfer Start.

1 (START): Start the AES operation.

KEYCPEN

Key Capture Enable.

0 (DISABLED): Disable key capture.

1 (ENABLED): Enable key capture.

EDMD

Encryption/Decryption Mode.

0 (DECRYPT): AES module performs a decryption operation

1 (ENCRYPT): AES module performs an encryption operation.

SWMDEN

Software Mode Enable.

0 (DISABLED): Disable software mode.

1 (ENABLED): Enable software mode.

BEN

Bypass AES Operation Enable.

0 (DISABLED): Do not bypass AES operations.

1 (ENABLED): Bypass AES operations.

XOREN

XOR Enable.

0 (XOR_DISABLED): Disable the XOR paths.

1 (XOR_INPUT): Enable the XOR input path, disable the XOR output path.

2 (XOR_OUTPUT): Disable the XOR input path, enable the XOR output path.

HCTREN

Hardware Counter Mode Enable.

0 (DISABLED): Disable hardware counter mode.

1 (ENABLED): Enable hardware counter mode.

HCBCEN

Hardware Cipher-Block Chaining Mode Enable.

0 (DISABLED): Disable hardware cipher-block chaining (CBC) mode.

1 (ENABLED): Enable hardware cipher-block chaining (CBC) mode.

KEYSIZE

Keystore Size Select.

0 (KEY128): Key is composed of 128 bits.

1 (KEY192): Key is composed of 192 bits.

2 (KEY256): Key is composed of 256 bits.

ERRIEN

Error Interrupt Enable.

0 (DISABLED): Disable the error interrupt.

1 (ENABLED): Enable the error interrupt. An interrupt is generated when the Input/Output Data FIFO Overun (DORI), Input/Output Data FIFO Underun (DURI), or XOR Data FIFO Overrun (XORI) flags are set.

OCIEN

Operation Complete Interrupt Enable.

0 (DISABLED): Disable the operation complete interrupt.

1 (ENABLED): Enable the operation complete interrupt. An interrupt is generated when the Operation Complete Interrupt (OCI) flag is set.

DBGMD

AES Debug Mode.

0 (HALT): A debug breakpoint will cause the AES module to halt.

1 (RUN): The AES module will continue to operate while the core is halted in debug mode.

RESET

Module Soft Reset.

0 (INACTIVE): AES module is not in soft reset.

1 (ACTIVE): AES module is in soft reset and none of the module bits can be accessed.

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